/****************************************************************
 *
 * Project: Handle ARM M4 STM32F407VG In 2 Weeks
 * 
 ****************************************************************/

/****************************************************************
 *
 *	Module		: "Source code file" myUsart.c
 *  Tool		: KeilC ARM 4.22a
 *	Chip		: STM32F407VG
 * 	History		: 9/12/2011
 *	Description	: Day 7
				  + My library to exchange data via Usart peripheral
				  + Reference to header file "myUsart.h"
 *				
 *	Author		: Dang Anh Tung			
 *	Description	: www.payitforward.edu.vn
 *				
 *
 ****************************************************************/

 
 /****************************************************************
 * 							IMPORT
 ****************************************************************/
#include "myUsart.h"

/*****************************************************************
* 							DEFINE
******************************************************************/


 /****************************************************************
 * 							GLOBAL
 ****************************************************************/



DMA_InitTypeDef DmaUsart1TxStruct; 
uint8_t DmaUsart1TxBuffer[20];

DMA_InitTypeDef DmaUsart1RxStruct;
uint8_t DmaUsart1RxBuffer[20];

DMA_InitTypeDef DmaUsart2TxStruct;
uint8_t DmaUsart2TxBuffer[20];

DMA_InitTypeDef DmaUsart2RxStruct;
uint8_t DmaUsart2RxBuffer[20];

DMA_InitTypeDef DmaUart4TxStruct;
uint8_t DmaUart4TxBuffer[20];

DMA_InitTypeDef DmaUart4RxStruct;
uint8_t DmaUart4RxBuffer[20];


 /****************************************************************
 * 						   FUNCTIONS
 ****************************************************************/



/****************************************************************
** Function name:	    myUsartInit
**
** Descriptions:		Init all USART/UART peripheral that will be used in IMU
**
** parameters:			None
** Returned value:		None
** 
*****************************************************************/


void myUsartInit(void)
{
	GPIO_InitTypeDef  GPIO_InitStructure;
	USART_InitTypeDef  USART_InitStructure;

	/*
	*	Configure USART1 TX & RX
	*	USART1_TX at PB6 
	*   USART1_RX at PB7
	*   USART1 = { Baudrate = 115200, dataBit = 8, stopBit = 1, No parity }
	*/

	// Enable clock for UART1 peripheral
	RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE) ;
	// Enable clock for TX,RX pins
	RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOB, ENABLE);
	//enable alternate function at TX,RX pins
	GPIO_PinAFConfig(GPIOB, GPIO_PinSource6, GPIO_AF_USART1);	  //TX USART1
	GPIO_PinAFConfig(GPIOB, GPIO_PinSource7, GPIO_AF_USART1);	  //RX USART1
	// Config IO 
	GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6|GPIO_Pin_7; 
	GPIO_InitStructure.GPIO_Mode  = GPIO_Mode_AF;
	GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
	GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
	GPIO_InitStructure.GPIO_PuPd  = GPIO_PuPd_NOPULL;
	GPIO_Init(GPIOB, &GPIO_InitStructure);
	//INIT Usart properties
	USART_InitStructure.USART_BaudRate = 115200;
	USART_InitStructure.USART_WordLength = USART_WordLength_8b;
	USART_InitStructure.USART_StopBits = USART_StopBits_1;
	USART_InitStructure.USART_Parity = USART_Parity_No;
	USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
	USART_InitStructure.USART_HardwareFlowControl =  USART_HardwareFlowControl_None;
	// Note: using RX_DMA DO NOT enable receive interrupt
	//USART_ITConfig(USART1, USART_IT_RXNE, ENABLE);	// cho phep bo thu	
	//USART_ITConfig(USART1, USART_IT_TXE, ENABLE);
	USART_Init(USART1, &USART_InitStructure);
	// Enable usart1
	USART_Cmd(USART1, ENABLE);
			
	// Enable TX-RX DMA request
	//USART_DMACmd(USART1, USART_DMAReq_Tx|USART_DMAReq_Rx, ENABLE);
    USART_DMACmd(USART1, USART_DMAReq_Tx, ENABLE);

//	/*
//	*	Configure USART2 TX & RX
//	*	USART2_TX at PA2
//	*   USART2_RX at PA3
//	*   USART2 = { Baudrate = 115200, dataBit = 8, stopBit = 1, No parity }
//	*/
//
//	// Enable clock for USART2 peripheral
//	RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE) ;
//	// Enable clock for TX,RX pins
//	RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE);
//	// Enable alternate function at TX,RX pins
//	GPIO_PinAFConfig(GPIOA, GPIO_PinSource2, GPIO_AF_USART2);	  //TX USART2
//	GPIO_PinAFConfig(GPIOA, GPIO_PinSource3, GPIO_AF_USART2);	  //RX USART2
//	// Config IO 
//	GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2|GPIO_Pin_3; 
//	GPIO_Init(GPIOA, &GPIO_InitStructure);
//	//INIT Usart properties
//	USART_Init(USART2, &USART_InitStructure);
//	// Using RX_DMA DO NOT enable receive interrupt
//	USART_ITConfig(USART2, USART_IT_RXNE, DISABLE);	
//	USART_ITConfig(USART2, USART_IT_TXE, DISABLE);
//	// Enable usart1
//	USART_Cmd(USART2, ENABLE);	
//	// Enable TX-RX DMA request
//	USART_DMACmd(USART2, USART_DMAReq_Tx|USART_DMAReq_Rx, ENABLE);
//
//	/*
//	*	Configure UART4 TX & RX
//	*	UART4_TX at PA0
//	*   UART4_RX at PA1
//	*   UART4 = { Baudrate = 115200, dataBit = 8, stopBit = 1, No parity }
//	*/
//
//	// Enable clock for UART4 peripheral
//	RCC_APB1PeriphClockCmd(RCC_APB1Periph_UART4, ENABLE);
//	// Enable clock for TX,RX pins
//	RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE);
//	//enable alternate function at TX,RX pins
//	GPIO_PinAFConfig(GPIOA, GPIO_PinSource0, GPIO_AF_UART4);	  //TX UART4
//	GPIO_PinAFConfig(GPIOA, GPIO_PinSource1, GPIO_AF_UART4);	  //RX UART4
//	// Config IO 
//	GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0|GPIO_Pin_1; 
//	GPIO_Init(GPIOA, &GPIO_InitStructure);
//	//INIT Usart properties
//	USART_Init(UART4, &USART_InitStructure);
//	// Using RX_DMA DO NOT enable receive interrupt
//	USART_ITConfig(UART4, USART_IT_RXNE, DISABLE);	
//	USART_ITConfig(UART4, USART_IT_TXE, DISABLE);
//	// Enable usart1
//	USART_Cmd(UART4, ENABLE);	
//	// Enable TX-RX DMA request
//	USART_DMACmd(UART4, USART_DMAReq_Tx|USART_DMAReq_Rx, ENABLE);	

}

/****************************************************************
** Function name:	    myUsartDmaInit
**
** Descriptions:		Init DMA for all USART/UART peripheral that will be used in IMU
**
** parameters:			None
** Returned value:		None
** 
*****************************************************************/

void myDmaUsartInit(void)
{
	/*
	*	Enable DMA2 USART1 TX : Stream 7, Channel 4
	*	DMA = { DMA_USART1_TX_STREAM, DMA_USART1_TX_CHANNEL, Memory To Peripheral...}
	*
	*/
	//	Enable clock to DMA2 controller
	RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA2, ENABLE);
	//	Default reset state
	DMA_DeInit(DMA_USART1_TX_STREAM);
	//	Config struct property: DmaUsart1TxStruct			
	DmaUsart1TxStruct.DMA_Channel 				= DMA_USART1_TX_CHANNEL;
	DmaUsart1TxStruct.DMA_DIR 					= DMA_DIR_MemoryToPeripheral;
	DmaUsart1TxStruct.DMA_Memory0BaseAddr 		= (uint32_t)DmaUsart1TxBuffer; 
    DmaUsart1TxStruct.DMA_PeripheralBaseAddr 	= DMA_USART1_TX_PERIPH;   
	DmaUsart1TxStruct.DMA_PeripheralDataSize 	= DMA_PeripheralDataSize_Byte;
	DmaUsart1TxStruct.DMA_MemoryDataSize 		= DMA_MemoryDataSize_Byte;
	DmaUsart1TxStruct.DMA_Priority 				= DMA_USART1_TX_PRIORITY;
	DmaUsart1TxStruct.DMA_FIFOMode 				= DMA_FIFOMode_Enable;
	DmaUsart1TxStruct.DMA_FIFOThreshold 		= DMA_FIFOThreshold_Full;
	DmaUsart1TxStruct.DMA_MemoryInc 			= DMA_MemoryInc_Enable;
	DmaUsart1TxStruct.DMA_PeripheralInc 		= DMA_PeripheralInc_Disable;
	DmaUsart1TxStruct.DMA_Mode 					= DMA_Mode_Normal;
	DmaUsart1TxStruct.DMA_BufferSize 			= (uint32_t)10 ;				//just init value , can be changed whenever
	DmaUsart1TxStruct.DMA_MemoryBurst 			= DMA_MemoryBurst_Single;
	DmaUsart1TxStruct.DMA_PeripheralBurst 		= DMA_PeripheralBurst_Single;
	//Enable DMA Stream Transfer Complete interrupt
	DMA_ITConfig(DMA_USART1_TX_STREAM, DMA_IT_TC, ENABLE);
	DMA_Init(DMA_USART1_TX_STREAM, &DmaUsart1TxStruct);	

	
//	/*
//	*	Enable DMA2 USART1 RX : Stream 5, Channel 4
//	*	DMA = { DMA_USART1_RX_STREAM, DMA_USART1_RX_CHANNEL, Peripheral To Memory...}
//	*
//	*/
//	//	Enable clock to DMA2 controller
//	RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA2, ENABLE);
//	//	Default reset state
//	DMA_DeInit(DMA_USART1_RX_STREAM);
//	//	Config struct property: DmaUsart1TxStruct		
//	DmaUsart1RxStruct.DMA_Channel 				= DMA_USART1_RX_CHANNEL;
//	DmaUsart1RxStruct.DMA_DIR 					= DMA_DIR_PeripheralToMemory;
//	DmaUsart1RxStruct.DMA_Memory0BaseAddr 		= (uint32_t)DmaUsart1RxBuffer; 
//    DmaUsart1RxStruct.DMA_PeripheralBaseAddr 	= DMA_USART1_RX_PERIPH;   
//	DmaUsart1RxStruct.DMA_PeripheralDataSize 	= DMA_PeripheralDataSize_Byte;
//	DmaUsart1RxStruct.DMA_MemoryDataSize 		= DMA_MemoryDataSize_Byte;
//	DmaUsart1RxStruct.DMA_Priority 				= DMA_USART1_RX_PRIORITY;
//	DmaUsart1RxStruct.DMA_FIFOMode 				= DMA_FIFOMode_Enable;
//	DmaUsart1RxStruct.DMA_FIFOThreshold 		= DMA_FIFOThreshold_Full;
//	DmaUsart1RxStruct.DMA_MemoryInc 			= DMA_MemoryInc_Enable;
//	DmaUsart1RxStruct.DMA_PeripheralInc 		= DMA_PeripheralInc_Disable;
//	DmaUsart1RxStruct.DMA_Mode 					= DMA_Mode_Normal;
//	DmaUsart1RxStruct.DMA_BufferSize 			= (uint32_t)10 ;				//just init value , must be changed when use it
//	DmaUsart1RxStruct.DMA_MemoryBurst 			= DMA_MemoryBurst_Single;
//	DmaUsart1RxStruct.DMA_PeripheralBurst 		= DMA_PeripheralBurst_Single;
//	//Enable DMA Stream Transfer Complete interrupt
//	DMA_ITConfig(DMA_USART1_RX_STREAM, DMA_IT_TC, ENABLE);
//	DMA_Init(DMA_USART1_RX_STREAM, &DmaUsart1RxStruct);
//	
//	/*
//	*	Enable DMA1 USART2 TX : Stream 6, Channel 4
//	*	DMA = { DMA_USART2_TX_STREAM, DMA_USART2_TX_CHANNEL, Memory To Peripheral...}
//	*
//	*/
//	//	Enable clock to DMA1 controller
//	RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA1, ENABLE);
//	//	Default reset state
//	DMA_DeInit(DMA_USART2_TX_STREAM);
//	//	Config struct property: DmaUsart1TxStruct			
//	DmaUsart2TxStruct.DMA_Channel 				= DMA_USART2_TX_CHANNEL;
//	DmaUsart2TxStruct.DMA_DIR 					= DMA_DIR_MemoryToPeripheral;
//	DmaUsart2TxStruct.DMA_Memory0BaseAddr 		= (uint32_t)DmaUsart2TxBuffer; 
//    DmaUsart2TxStruct.DMA_PeripheralBaseAddr 	= DMA_USART2_TX_PERIPH;   
//	DmaUsart2TxStruct.DMA_PeripheralDataSize 	= DMA_PeripheralDataSize_Byte;
//	DmaUsart2TxStruct.DMA_MemoryDataSize 		= DMA_MemoryDataSize_Byte;
//	DmaUsart2TxStruct.DMA_Priority 				= DMA_USART2_TX_PRIORITY;
//	DmaUsart2TxStruct.DMA_FIFOMode 				= DMA_FIFOMode_Enable;
//	DmaUsart2TxStruct.DMA_FIFOThreshold 		= DMA_FIFOThreshold_Full;
//	DmaUsart2TxStruct.DMA_MemoryInc 			= DMA_MemoryInc_Enable;
//	DmaUsart2TxStruct.DMA_PeripheralInc 		= DMA_PeripheralInc_Disable;
//	DmaUsart2TxStruct.DMA_Mode 					= DMA_Mode_Normal;
//	DmaUsart2TxStruct.DMA_BufferSize 			= (uint32_t)10 ;				//just init value , can be changed whenever
//	DmaUsart2TxStruct.DMA_MemoryBurst 			= DMA_MemoryBurst_Single;
//	DmaUsart2TxStruct.DMA_PeripheralBurst 		= DMA_PeripheralBurst_Single;
//	//Enable DMA Stream Transfer Complete interrupt
//	DMA_ITConfig(DMA_USART2_TX_STREAM, DMA_IT_TC, ENABLE);
//	DMA_Init(DMA_USART2_TX_STREAM, &DmaUsart2TxStruct);	
//	
//	/*
//	*	Enable DMA1 USART2 RX : Stream 5, Channel 4
//	*	DMA = { DMA_USART2_RX_STREAM, DMA_USART1_RX_CHANNEL, Peripheral To Memory...}
//	*
//	*/
//	//	Enable clock to DMA1 controller
//	RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA1, ENABLE);
//	//	Default reset state
//	DMA_DeInit(DMA_USART2_RX_STREAM);
//	//	Config struct property: DmaUsart1TxStruct		
//	DmaUsart2RxStruct.DMA_Channel 				= DMA_USART2_RX_CHANNEL;
//	DmaUsart2RxStruct.DMA_DIR 					= DMA_DIR_PeripheralToMemory;
//	DmaUsart2RxStruct.DMA_Memory0BaseAddr 		= (uint32_t)DmaUsart2RxBuffer; 
//    DmaUsart2RxStruct.DMA_PeripheralBaseAddr 	= DMA_USART2_RX_PERIPH;   
//	DmaUsart2RxStruct.DMA_PeripheralDataSize 	= DMA_PeripheralDataSize_Byte;
//	DmaUsart2RxStruct.DMA_MemoryDataSize 		= DMA_MemoryDataSize_Byte;
//	DmaUsart2RxStruct.DMA_Priority 				= DMA_USART2_RX_PRIORITY;
//	DmaUsart2RxStruct.DMA_FIFOMode 				= DMA_FIFOMode_Enable;
//	DmaUsart2RxStruct.DMA_FIFOThreshold 		= DMA_FIFOThreshold_Full;
//	DmaUsart2RxStruct.DMA_MemoryInc 			= DMA_MemoryInc_Enable;
//	DmaUsart2RxStruct.DMA_PeripheralInc 		= DMA_PeripheralInc_Disable;
//	DmaUsart2RxStruct.DMA_Mode 					= DMA_Mode_Normal;
//	DmaUsart2RxStruct.DMA_BufferSize 			= (uint32_t)10 ;				//just init value , must be changed when use it
//	DmaUsart2RxStruct.DMA_MemoryBurst 			= DMA_MemoryBurst_Single;
//	DmaUsart2RxStruct.DMA_PeripheralBurst 		= DMA_PeripheralBurst_Single;
//	//Enable DMA Stream Transfer Complete interrupt
//	DMA_ITConfig(DMA_USART2_RX_STREAM, DMA_IT_TC, ENABLE);
//	DMA_Init(DMA_USART2_RX_STREAM, &DmaUsart2RxStruct);	
//
//	/*
//	*	Enable DMA1 UART4 TX : Stream 4, Channel 4
//	*	DMA = { DMA_UART4_TX_STREAM, DMA_UART4_TX_CHANNEL, Memory To Peripheral...}
//	*
//	*/
//	//	Enable clock to DMA1 controller
//	RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA1, ENABLE);
//	//	Default reset state
//	DMA_DeInit(DMA_UART4_TX_STREAM);
//	//	Config struct property: DmaUsart1TxStruct			
//	DmaUart4TxStruct.DMA_Channel 				= DMA_UART4_TX_CHANNEL;
//	DmaUart4TxStruct.DMA_DIR 					= DMA_DIR_MemoryToPeripheral;
//	DmaUart4TxStruct.DMA_Memory0BaseAddr 		= (uint32_t)DmaUart4TxBuffer; 
//    DmaUart4TxStruct.DMA_PeripheralBaseAddr 	= DMA_UART4_TX_PERIPH;   
//	DmaUart4TxStruct.DMA_PeripheralDataSize 	= DMA_PeripheralDataSize_Byte;
//	DmaUart4TxStruct.DMA_MemoryDataSize 		= DMA_MemoryDataSize_Byte;
//	DmaUart4TxStruct.DMA_Priority 				= DMA_UART4_TX_PRIORITY;
//	DmaUart4TxStruct.DMA_FIFOMode 				= DMA_FIFOMode_Enable;
//	DmaUart4TxStruct.DMA_FIFOThreshold 			= DMA_FIFOThreshold_Full;
//	DmaUart4TxStruct.DMA_MemoryInc 				= DMA_MemoryInc_Enable;
//	DmaUart4TxStruct.DMA_PeripheralInc 			= DMA_PeripheralInc_Disable;
//	DmaUart4TxStruct.DMA_Mode 					= DMA_Mode_Normal;
//	DmaUart4TxStruct.DMA_BufferSize 			= (uint32_t)10 ;				//just init value , can be changed whenever
//	DmaUart4TxStruct.DMA_MemoryBurst 			= DMA_MemoryBurst_Single;
//	DmaUart4TxStruct.DMA_PeripheralBurst 		= DMA_PeripheralBurst_Single;
//	//Enable DMA Stream Transfer Complete interrupt
//	DMA_ITConfig(DMA_UART4_TX_STREAM, DMA_IT_TC, ENABLE);
//	DMA_Init(DMA_UART4_TX_STREAM, &DmaUart4TxStruct);	
//	
//	/*
//	*	Enable DMA1 UART4 RX : Stream 2, Channel 4
//	*	DMA = { DMA_UART4_RX_STREAM, DMA_UART4_RX_CHANNEL, Peripheral To Memory...}
//	*
//	*/
//	//	Enable clock to DMA1 controller
//	RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA1, ENABLE);
//	//	Default reset state
//	DMA_DeInit(DMA_UART4_RX_STREAM);
//	//	Config struct property: DmaUsart1TxStruct		
//	DmaUart4RxStruct.DMA_Channel 				= DMA_UART4_RX_CHANNEL;
//	DmaUart4RxStruct.DMA_DIR 					= DMA_DIR_PeripheralToMemory;
//	DmaUart4RxStruct.DMA_Memory0BaseAddr 		= (uint32_t)DmaUart4RxBuffer; 
//    DmaUart4RxStruct.DMA_PeripheralBaseAddr 	= DMA_UART4_RX_PERIPH;   
//	DmaUart4RxStruct.DMA_PeripheralDataSize 	= DMA_PeripheralDataSize_Byte;
//	DmaUart4RxStruct.DMA_MemoryDataSize 		= DMA_MemoryDataSize_Byte;
//	DmaUart4RxStruct.DMA_Priority 				= DMA_UART4_RX_PRIORITY;
//	DmaUart4RxStruct.DMA_FIFOMode 				= DMA_FIFOMode_Enable;
//	DmaUart4RxStruct.DMA_FIFOThreshold 			= DMA_FIFOThreshold_Full;
//	DmaUart4RxStruct.DMA_MemoryInc 				= DMA_MemoryInc_Enable;
//	DmaUart4RxStruct.DMA_PeripheralInc 			= DMA_PeripheralInc_Disable;
//	DmaUart4RxStruct.DMA_Mode 					= DMA_Mode_Normal;
//	DmaUart4RxStruct.DMA_BufferSize 			= (uint32_t)10 ;				//just init value , must be changed when use it
//	DmaUart4RxStruct.DMA_MemoryBurst 			= DMA_MemoryBurst_Single;
//	DmaUart4RxStruct.DMA_PeripheralBurst 		= DMA_PeripheralBurst_Single;
//	//Enable DMA Stream Transfer Complete interrupt
//	DMA_ITConfig(DMA_UART4_RX_STREAM, DMA_IT_TC, ENABLE);
//	DMA_Init(DMA_UART4_RX_STREAM, &DmaUart4RxStruct);
				
}

/****************************************************************
** Function name:	    myDmaUsartInterruptInit
**
** Descriptions:		Init Interrupt for all USART/UART peripheral that will be used in IMU
**
** parameters:			None
** Returned value:		None
** 
*****************************************************************/

void myDmaUsartInterruptInit(void)
{
	NVIC_InitTypeDef NVIC_InitStruct;

	/*
	*	DMA2 USART1 TX Interrupt
	*
	*/
	NVIC_InitStruct.NVIC_IRQChannel = DMA_USART1_TX_STREAM_IRQ;
	NVIC_InitStruct.NVIC_IRQChannelPreemptionPriority = 1;
	NVIC_InitStruct.NVIC_IRQChannelSubPriority = 0;			  //sub- receive interrupt highest = 0
	NVIC_InitStruct.NVIC_IRQChannelCmd = ENABLE;
	NVIC_Init(&NVIC_InitStruct);
	
//	/*
//	*	DMA2 USART1 RX Interrupt
//	*
//	*/
//	NVIC_InitStruct.NVIC_IRQChannel = DMA_USART1_RX_STREAM_IRQ;
//	NVIC_InitStruct.NVIC_IRQChannelPreemptionPriority = 0;
//	NVIC_InitStruct.NVIC_IRQChannelSubPriority = 0;			  //sub- receive interrupt highest = 0
//	NVIC_InitStruct.NVIC_IRQChannelCmd = ENABLE;
//	NVIC_Init(&NVIC_InitStruct);
//
//	/*
//	*	DMA1 USART2 TX Interrupt
//	*
//	*/
//	NVIC_InitStruct.NVIC_IRQChannel = DMA_USART2_TX_STREAM_IRQ;
//	NVIC_InitStruct.NVIC_IRQChannelPreemptionPriority = 1;
//	NVIC_InitStruct.NVIC_IRQChannelSubPriority = 0;			  //sub- receive interrupt highest = 0
//	NVIC_InitStruct.NVIC_IRQChannelCmd = ENABLE;
//	NVIC_Init(&NVIC_InitStruct);
//	
//	/*
//	*	DMA1 USART2 RX Interrupt
//	*
//	*/
//	NVIC_InitStruct.NVIC_IRQChannel = DMA_USART2_RX_STREAM_IRQ;
//	NVIC_InitStruct.NVIC_IRQChannelPreemptionPriority = 0;
//	NVIC_InitStruct.NVIC_IRQChannelSubPriority = 0;			  //sub- receive interrupt highest = 0
//	NVIC_InitStruct.NVIC_IRQChannelCmd = ENABLE;
//	NVIC_Init(&NVIC_InitStruct);
//
//
//	/*
//	*	DMA1 UART4 TX Interrupt
//	*
//	*/
//	NVIC_InitStruct.NVIC_IRQChannel = DMA_UART4_TX_STREAM_IRQ;
//	NVIC_InitStruct.NVIC_IRQChannelPreemptionPriority = 1;
//	NVIC_InitStruct.NVIC_IRQChannelSubPriority = 0;			  //sub- receive interrupt highest = 0
//	NVIC_InitStruct.NVIC_IRQChannelCmd = ENABLE;
//	NVIC_Init(&NVIC_InitStruct);
//
//
//	/*
//	*	DMA1 UART4 RX Interrupt
//	*
//	*/
//	NVIC_InitStruct.NVIC_IRQChannel = DMA_UART4_RX_STREAM_IRQ;
//	NVIC_InitStruct.NVIC_IRQChannelPreemptionPriority = 0;
//	NVIC_InitStruct.NVIC_IRQChannelSubPriority = 0;			  //sub- receive interrupt highest = 0
//	NVIC_InitStruct.NVIC_IRQChannelCmd = ENABLE;
//	NVIC_Init(&NVIC_InitStruct);
}

/****************************************************************
** Function name:	    myUsartSendBytes
**
** Descriptions:		USART/UART send bytes/String by normal bus
**
** parameters:		    !!!NOTE!!! USARTx, x = {1,2,4}
** Returned value:		None
** 
*****************************************************************/

void myUsartSendBytes(USART_TypeDef* USARTx, uint8_t *byte,uint32_t numByte)
{
	if( numByte )
	{
		while(numByte)
		{
			USART_SendData(USARTx,(uint16_t)*byte);
			while(USART_GetFlagStatus(USARTx, USART_FLAG_TC) == RESET);  //wait until tranmission complete
			byte++;
			numByte--;
		}		
	}	
}

/****************************************************************
** Function name:	    myUsartSendBytes
**
** Descriptions:		USART/UART send string by DMA bus
**
** parameters:		    !!!NOTE!!!! USARTx, x = {1,2,4}
**						DMAy_Streamx = dma_stream_tx
** Returned value:		None
** 
*****************************************************************/

void myUsartSendDma(DMA_Stream_TypeDef* DMAy_Streamx, USART_TypeDef* USARTx, uint8_t *sendBuf, uint32_t numByte)
{
	// USART must be init before use this code: enable USART, enable DMA_TX 
	//wait until the stream is free; all configuration must do when bit-EN = 0
	while(DMA_GetCmdStatus(DMAy_Streamx) == ENABLE); 
    //re-init DMA 	
	if ( USARTx == USART1)
	{
		DmaUsart1TxStruct.DMA_Memory0BaseAddr = (uint32_t)sendBuf; 
		DmaUsart1TxStruct.DMA_BufferSize      = (uint32_t)numByte;
		DMA_Init(DMAy_Streamx, &DmaUsart1TxStruct);
	}
	else if ( USARTx == USART2)
	{
		DmaUsart2TxStruct.DMA_Memory0BaseAddr = (uint32_t)sendBuf; 
		DmaUsart2TxStruct.DMA_BufferSize      = (uint32_t)numByte;
		DMA_Init(DMAy_Streamx, &DmaUsart2TxStruct);		
	}
	else if (USARTx == UART4)
	{
		DmaUart4TxStruct.DMA_Memory0BaseAddr = (uint32_t)sendBuf; 
		DmaUart4TxStruct.DMA_BufferSize      = (uint32_t)numByte;
		DMA_Init(DMAy_Streamx, &DmaUart4TxStruct);
	}
	else
	{
		return;
	}

	USART_ClearFlag(USARTx, USART_FLAG_TC);			//clear "transmission complete frame" flag
	//DMAR bit RE-ENABLE: ready to send	
    DMA_Cmd(DMAy_Streamx, ENABLE);	
}
